Authors’ information SHS and JMC are M.S. students who are studying at the School of Electrical Engineering, Kookmin University, Seoul, Korea. SC is a professor at the Division of Electronics and Information Engineering, Chonbuk National University, Jeonju, Korea. KSM is a professor at the School of Electrical Engineering, Kookmin University, Seoul, Korea. Acknowledgements
This work was financially selleck inhibitor supported by the SRC/ERC program (R11-2005-048-00000-0), the Basic Science Research Program (2010–0023469), the Global Research Network Program (NRF-2011-220-D00089), the Nano-Material Technology Development Program (2011–0030228), and NRF-2013K1A3A1A25038533 through the National Research Foundation of Korea (NRF) funded by the Ministry of Science, ICT & Future Planning, and the Industrial Strategic Technology Development Program funded by the Ministry of Trade, Industry and Energy (MOTIE, Selonsertib Korea) (10039239). The CAD tools were supported by the IC Design Education Center (IDEC), Korea. A part of this work was presented at the Collaborative Conference on 3D & Materials
Research (CC3DMR), Jeju, Korea, in June 2013. References 1. TEW-7197 chemical structure Strukov DB, Snider GS, Stewart DR, Williams RS: The missing memristor found. Nature 2008, 453:80–83.CrossRef 2. Jo KH, Jung CM, Min KS, Kang SM: Memristor models and circuits for controlling Process-VDD-Temperature variations. IEEE Trans Nanotechnol 2010,9(6):675–678.CrossRef 3. Pershin YV, Ventra MD: Practical approach to programmable analog circuits with memristors. IEEE Trans Circuits Syst-I 2010,57(8):1857–1864.CrossRef HAS1 4. Jung CM, Jo KH, Min KS: SPICE macromodel and CMOS emulator for memristors. J Nanosci Nanotechnol 2012,12(2):1487–1491.CrossRef 5. Kim H, Sah MP, Yang C, Cho S: Memristor emulator for memristor circuit applications. IEEE Trans Circuits and Syst-I 2012,59(10):2422–2431.CrossRef 6. Choi JM, Shin
SH, Cho SI, Min KS: CMOS circuit with small area and low complexity for emulating memristive behavior. In Collaborative Conference on 3D & Materials Research (CC3DMR). Jeju in Korea: ; 2013. 7. Corinto F, Ascoli A: A boundary condition-based approach to the modeling of memristor nano-structures. IEEE Trans Circuits and Syst-I 2012,59(11):2713–2726.CrossRef 8. Corinto F, Ascoli A: Memristive diode bridge with LCR filter. Electronics Letters 2012,48(14):824–825.CrossRef 9. Lee KJ, Cho BK, Cho WY, Kang S, Choi BG, Oh HR, Lee CS, Kim HJ, Park JM, Wang Q, Park MH, Ro YH, Choi JY, Kim KS, Kim YR, Shin IC, Lim KW, Cho HK, Choi CH, Chung WR, Kim DE, Yoon YJ, Yu KS, Jeong GT, Jeong HS, Kwak CK, Kim CH: A 90 nm 1.8 V 512 Mb diode-switch PRAM with 266 MB/s read throughput. IEEE J Solid-State Circuits 2008,43(1):150–161.CrossRef 10. Qureshi MS, Pickett M, Miao F, Strachan JP: CMOS interface circuits for reading and writing memristor crossbar array. In IEEE International Symposium on Circuits and Systems (ISCAS): 15–18 May 2011; Rio de Janeiro. Piscataway: IEEE; 2011:2954–2957.
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