Today’s dominant memory EPZ015666 technologies are DRAM and Flash, both have scaling issues. The DRAM offers very high endurance (approximately 1014 cycles); however, the endurance of Flash is limited (approximately 106 cycles), and the operation is slow as the
program/erase time is relatively high (microseconds SBI-0206965 research buy up to milliseconds). Generally, it needs high voltage for program and erase operations (>׀10 ׀V) [2, 3]. In order to overcome these problems, other non-volatile memories such as ferroelectric RAM (FeRAM) [4, 5], magnetic RAM (MRAM) [6, 7], phase-change-memory (PCM) [8], and resistive RAM (RRAM) are being investigated [9–25]. The basic memories, prototypical, and emerging memories with respect to various performance parameters from International Technology Roadmap for Semiconductors (ITRS) in 2012 have been compared [26]. All these memories store data by resistance change in contrast to charge as in basic memories. In FeRAM, the polarization direction of the dipoles in the ferroelectric layer can be switched by applying the electric field which, in turn, leads the different memory states. MRAM utilizes the orientation of magnetization of a small magnetic element by the application of magnetic field which gives rise to the change in the electric resistance and enable
data bits to be stored. Although, Ferrostatin-1 nmr FeRAM and MRAM both have fast switching (<20 ns) and long endurance (>1015 cycles), these memories show insufficient scalability [27]. Moreover, MRAM needs high programming current (in the range of milliampere) [6]. Compared to FeRAM and MRAM, PCM offers greater potential for future application because of its better
scalability [27]. In principle, PCM heats up a material changing it from low-resistance polycrystalline phase to a high-resistance amorphous phase reversibly. So in PCM, the generated heat, i.e., thermal effect, controls the switching. Due to this, the PCM cell needs more power for switching which limits its application DNA Damage inhibitor in low-power devices. All memories discussed above are in production, though RRAM is at its early maturity level and it shows excellent potential to meet ITRS requirements for next-generation memory technology. Apart from its non-volatility, it shows good scalability potential below 10 nm. Some of the RRAM advantages are summarized in schematic diagram (Figure 1). Ho et al. [28] has demonstrated a 9-nm half-pitch RRAM device. They showed that if high-density vertical bipolar junction transistor will be used as a select transistor, it cannot provide the programming current required for PCRAM below 40 nm while for RRAM, it can be used even below 10 nm. Park et al. [20] reported sub-5-nm device in a Pt/TiO2/Cu structure. Ultra-high-speed operation of RRAM using atomic layer deposited HfO2 switching material is reported by Lee et al. [29], where a 300-ps pulse of only 1.4 V, successfully switches the device without any change in memory window. Torrezan et al. [21] also demonstrated the fast switching speed of 105 ps.
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